Panasonic ST50

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Revision as of 15:01, 15 December 2012 by Konsolkongen (talk | contribs) (Created page with "=== EDID === header: 00 ff ff ff ff ff ff 00 serial number: 34 a9 96 a2 01 01 01 01 00 16 version: 01 03 basic params: 80 00 00 78 0a chroma info: ...")
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EDID

header:          00 ff ff ff ff ff ff 00
serial number:   34 a9 96 a2 01 01 01 01 00 16
version:         01 03
basic params:    80 00 00 78 0a
chroma info:     da ff a3 58 4a a2 29 17 49 4b
established:     00 00 00
standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1:    02 3a 80 d0 72 38 2d 40 10 2c 45 80 ba 88 21 00 00 1e
descriptor 2:    02 3a 80 18 71 38 2d 40 58 2c 45 00 ba 88 21 00 00 1e
descriptor 3:    00 00 00 fc 00 50 61 6e 61 73 6f 6e 69 63 2d 54 56 0a
descriptor 4:    00 00 00 fd 00 17 3d 0f 44 0f 00 0a 20 20 20 20 20 20
extensions:      01
checksum:        dd
Manufacturer: MEI Model a296 Serial Number 16843009
Made week 0 of 2012
EDID version: 1.3
Digital display
Image size is variable
Gamma: 2.20
Supported color formats: RGB 4:4:4, YCrCb 4:2:2
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed mode: Clock 148.500 MHz, 698 mm x 392 mm
               1920 2448 2492 2640 hborder 0
               1080 1084 1089 1125 vborder 0
               +hsync +vsync
Detailed mode: Clock 148.500 MHz, 698 mm x 392 mm
               1920 2008 2052 2200 hborder 0
               1080 1084 1089 1125 vborder 0
               +hsync +vsync
Monitor name: Panasonic-TV
Monitor ranges: 23-61HZ vertical, 15-68kHz horizontal, max dotclock 150MHz
Has 1 extension blocks
Checksum: 0xdd

CEA extension block
Extension version: 3
50 bytes of CEA data
  Video data block
    VIC 31 (native)
    VIC 16 (native)
    VIC 20 
    VIC 05 
    VIC 32 
    VIC 19 
    VIC 04 
    VIC 18 
    VIC 03 
    VIC 17 
    VIC 02 
    VIC 22 
    VIC 07 
    VIC 21 
    VIC 06 
  Audio data block
  Vendor-specific data block, OUI 000c03 (HDMI)
    Source physical address 1.0.0.0
    Supports_AI
    DC_36bit
    DC_30bit
    DC_Y444
    Maximum TMDS clock: 190MHz
  Extended tag: Colorimetry data block
Basic audio support
Supports YCbCr 4:4:4
Supports YCbCr 4:2:2
2 native detailed modes
Detailed mode: Clock 74.250 MHz, 698 mm x 392 mm
               1920 2448 2492 2640 hborder 0
                540  542  547  562 vborder 0
               +hsync +vsync interlaced
Detailed mode: Clock 74.250 MHz, 698 mm x 392 mm
               1920 2008 2052 2200 hborder 0
                540  542  547  562 vborder 0
               +hsync +vsync interlaced
Detailed mode: Clock 74.250 MHz, 698 mm x 392 mm
               1280 1720 1760 1980 hborder 0
                720  725  730  750 vborder 0
               +hsync +vsync
Detailed mode: Clock 74.250 MHz, 698 mm x 392 mm
               1280 1390 1430 1650 hborder 0
                720  725  730  750 vborder 0
               +hsync +vsync
Checksum: 0xb6